Resistive thin films such as TaN are often used as resistors in semiconductor (e.g. GaAs, Si) applications. These resistor films can be sputtered or evaporated onto a wafer and then etched selectively. Alternately these resistor films can be delineated by means of a photoresist lift-off process. Current technology for connecting to thin film resistors falls primarily into two categories. The first utilizes lift-off metallic interconnects, and the second utilizes etched metallic interconnects with an interlevel dielectric and etched vias.
Generally, in the lift-off interconnect process, a thin film resistor is defined by etching or lift-off. Photoresist is applied and patterned, leaving the contact regions of the resistor exposed. Then a metallic layer for the interconnect is deposited and unwanted portions are lifted off. This process is straightforward but can be used only in limited applications where the metallic interconnects can be defined by lift-off.
Generally, in the etched interconnect process, a thin film resistor is formed by etching or lift-off. Then a lift-off material (e.g. photoresist) is used to deposit protective metal over the contact regions of the resistor. This metal is not the metallic interconnect, but is used instead to protect the thin film resistor during subsequent via etching. An interlevel dielectric is then deposited, followed by a patterning and etching of vias in the dielectric, stopping on the protective metal over the thin film resistor. Finally the metallic interconnect material is deposited, then patterned and etched. This process requires two masks for making the resistor structure; the first mask defines the resistor and the second mask defines the protective metal over the contact regions.